Many systems employ switched-capacitor circuits that make use of capacitors and switches for sampling and/or processing signals. For example, analog-to-digital converters (ADCs) often employ such circuits to sample an analog signal, e.g., a voltage, prior to analog-to-digital conversion.
Generally, timing signals are employed in the switched-capacitor circuits, and such timing signals may have a sampling interval, a conversion interval following the sampling interval, and an output interval. The timing signals during the sampling intervals are commanded to a state that connects one or more of the capacitors in the switched-capacitor circuits to sample an input voltage with respect to a reference voltage. The timing signals during the conversion interval command switches in the switched-capacitor circuits to various states in accordance with a conversion algorithm, and monitor the resulting output signals from a comparator. The timing signals during the output interval provide a multi-bit digital output signal based on the output signals received from the comparator during the conversion interval.
The timing signals during the conversion interval may further include a DAC settling time interval and a strobe latch time interval. The DAC settling time for conventional techniques can be as much as 10 nanoseconds or more. This is due to the use of additional switches to simplify the DAC circuit design, which in-turn can increase resistance in the DAC settling path that can sign significantly increase settling time in the switched capacitor DAC circuit.